Abstract
The scalability of CMOS technology has driven computation into a diverse range of applications across the power consumption, performance and size spectra. Communication is a necessary adjunct to computation, and whether in the context of high-performance computing, mobile devices or biomedical implants, chip-to-chip communication can take up a significant portion of the overall system power budget. A single interconnect methodology cannot address such a broad range of requirements efficiently. Nevertheless, there are a number of interesting design concepts that can facilitate efficient interconnect design, no matter what the application; this talk seeks to elucidate these concepts through design examples at both ends of the power/performance spectra. In particular we present efficient transceivers for parallel optical interconnects that can take advantage of recent advances in silicon photonic devices. Novel low-power clocking techniques, which are essential for synchronous data communication, will be discussed as well. We conclude this presentation with a brief discussion of limitations of on-chip signaling, our proposed solutions and applications of proximity communication in minimally invasive biomedical implants.
Biography
Azita Emami received her M.S. and Ph.D. degrees in Electrical Engineering from Stanford University in 1999 and 2004 respectively. She received her B.S. degree from Sharif University of Technology in 1996. At Stanford she was a member of VLSI Research Group, where she worked on variety of projects in the areas of integrated circuits and system design. Professor Emami joined IBM T. J. Watson Research Center in 2004 as a research staff member in the Communication Technologies Department. From Fall 2006 to Summer 2007, she was an Assistant Professor of Electrical Engineering at Columbia University in the city of New York. In 2007, she joined Caltech, where she is now a Professor of Electrical Engineering. Her current research interests include mixed-signal integrated circuits and systems, high-speed on-chip and chip-chip electrical and optical interconnects, system and circuit design solutions for highly-scaled CMOS technologies, clock generation and distribution, compressive sensing, wearable and implantable devices for neural recording, stimulation, and efficient drug delivery.